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Special data processing operations and customized peripheral interfaces shall be implemented, and the task load of other processor cores of SOC shall be reduced.

characteristic

• up to 1GHz Sitara ™ ARM ® Cortex ® - A8 32-bit thin

Instruction set computer (RISC) processor

– NEON ™ Single instruction stream multiple data stream (SIMD) coprocessor

– 32KB L1 instruction and 32KB data cache with unit error detection (parity)

– 256Kb L2 cache with error correction code (ECC)

– 176kb on-chip boot ROM

– 64KB dedicated RAM

– simulation and commissioning - JTAG

– interrupt controller (up to 128 interrupt requests can be controlled)

• on chip memory (shared L3 RAM)

– 64KB universal on chip memory controller (ocmc) random access

Memory (RAM)

– access to all hosts

– support hold for fast wake-up

• external memory interface (EMIF)

– MDDR (lpddr), DDR2, DDR3, ddr3l control

Device:

– MDDR: 200MHz clock (400MHz data rate)

– DDR2: 266MHz clock (532mhz data rate)

– DDR3: 400MHz clock (800MHz data rate)

– ddr3l: 400MHz clock (800MHz data rate)

– 16 bit data bus

– 1GB full addressable space

– supports one x16 or two X8 memory device configurations

– general purpose memory controller (GPMC)

– flexible 8-bit and 16 bit asynchronous memory interface with multiple

Up to seven chip selections (NAND, nor

SRAM）

– use BCH code, support 4-bit, 8-bit or 16 bit

ECC

– use Hamming code to support 1-bit ECC

– error locator module (ELM)

– when used with GPMC, it can be determined by BCH algorithm

Address of data error in the generated adjoint polynomial

– according to BCH algorithm, 4-bit, 8-bit and 16 bit per

512 byte block error location

• programmable real-time unit subsystem and industrial communication subsystem (pru)

ICSS)

– supported protocols such as EtherCAT ®、 PROFIBUS、

PROFINET、EtherNet/IP ™ etc.

– 2 programmable real time units (Pru)

– 32-bit load / storage RISC processing capable of running at 200MHz

implement

– 8KB instruction RAM with unit error detection (parity)

– 8KB data RAM with unit error detection (parity)

– single cycle 32-bit multiplier with 64 bit accumulator

– enhanced GPIO module provides move in / out branch for external signals

Holding and parallel locking

– 12KB shared RAM with unit error detection (parity)

– three 120 byte register sets accessible by each PRU

– interrupt controller (INTC) for processing system input events

– used to connect internal and external hosts to pru-icss internal resources

Local interconnect bus of the source

– peripherals in pru-icss:

– a universal asynchronous transceiver with flow control pins

(UART) port, supporting data rates up to 12mbps

– one enhanced capture (ECAP) module

– 2 MII Ethernet ports supporting industrial Ethernet, for example

Such as EtherCAT

– 1 MDIO port

• power, reset and clock management (PRCM) module

– control the entry and exit of standby mode and deep sleep mode

– responsible for sleep sequencing, power domain shutdown sequencing, wake-up sequencing and power

Source domain open sort

– clock

– integrated 15MHz to 35MHz high-frequency oscillator with

Used to generate reference clock for various system and peripheral clocks

– support separate clock enable and disable control of subsystems and peripherals

To help reduce power consumption

– five ADPLL (MPU subsystem) for generating system clock

System, DDR interface, USB and peripherals [MMC and SD

UART, SPI, I2C], L3, L4, Ethernet, gfx

[sgx530], LCD pixel clock)

– power supply

– two non switchable power domains (real time clock [RTC] and call

Wake up logic [wakeup])

– three switchable power domains (MPU subsystem [MPU]

Sgx530 [gfx], peripherals and infrastructure [per])

– execute SmartReflex ™ Class 2B, based on chip temperature

Process change and performance realization of core voltage regulation (adaptive power

Pressure regulation [AVS])

– dynamic voltage frequency scaling (dvfs)

• real time clock (RTC)

– real time date (year, month, day and day of week) and time (small

Hour, minute and second) information

– internal 32.768KHz oscillator, RTC logic and 1.1V internal

Low pressure drop regulator (LDO)

– independent power on reset (rtc_pwronrstn) input

– dedicated input pin (ext_wakeup) for external wake-up events

– programmable alarms can be used to generate PRCM internal interrupts (for wake-up) or cortex-a8 internal interrupts (for event notification)



– programmable alarm can be connected with external output (pmic_power_en)

Together to enable the power management IC to restore non RTC power

Source domain

• peripherals

– up to two USB 2.0 high-speed DRD (dual role device) ports with integrated phy

– up to two industrial Gigabit Ethernet Macs (10, 100 and

1000Mbps）

– integrated switch

– each MAC supports MII, RMII, rgmii, and

MDIO interface

– Ethernet MAC and switch can operate independently of other functions

– IEEE 1588v2 precision time protocol (PTP)

– up to 2 can ports

– supports can version 2 Part A and B

– up to two multichannel audio serial ports (mcasp)

– transmit and receive clock up to 50MHz

– each mcasp port with independent TX and Rx clocks

Corresponding to up to four serial data pins

– support time division multiplexing (TDM) and internal IC sound (I2S)

And similar formats

– support digital audio interface transmission (SPDIF, iec60958-1

And aes-3 format)

– FIFO buffer for sending and receiving (256 bytes)

– up to 6 UARTS

– all UARTS support IrDA and cir modes

– all UARTS support RTs and CTS flow control

– uart1 supports complete modem control

– up to two master-slave mcspi serial interfaces

– up to 2 chip choices

– up to 48 MHz

– up to three MMC, SD and SDIO ports

– 1-bit, 4-bit and 8-bit MMC, SD and SDIO modes

– mmcsd0 has power dedicated to 1.8V or 3.3V operation

Source track

– data transmission rate up to 48mhz

– support card detection and write protection

– complies with mmc4.3, SD and SDIO 2.0 specifications

– up to three I2C master-slave interfaces

– standard mode (up to 100kHz)

– fast mode (up to 400kHz)

– up to four general purpose I / O (GPIO) pins

– each group contains 32 GPIO pins (with other function pins

Multiplexing)

– GPIO pins can be used as interrupt inputs (up to two in each group

Off input)

– up to three external direct memory access (DMA) event inputs also

Can be used as interrupt input

– 8 32-bit universal timers

– dmtimer1 is 1ms for operating system (OS) beats

timer

– dmtimer4 – dmtimer7 are pin outputs

– one safety device timer

– sgx530 3D graphics engine

– puzzle architecture: up to 20 million polygons per second

– universal scalable shader engine (usse) is a

Multi thread engine with vertex shading function

– over Microsoft vs3.0, ps3.0 and ogl2.0

Advanced shading feature set

– Direct3D mobile, ogl-es 1.1 and 2.0, and

Industry standard API support for openmax

– fine task switching, load balancing and power management

– advanced geometry DMA driven operation to minimize

CPU interaction



– programmable high quality image anti aliasing

– full virtual for operating system operation in unified memory architecture

Analog memory addressing

– LCD controller

– 24 bit data output at most; 8 bits per pixel (RGB)

– resolution up to 2048 x 2048 (with the highest

126 MHz pixel clock)

– integrated LCD interface display driver (lidd) controller

– integrated grating controller

– the integrated DMA engine can be accessed from the outside through interrupt or firmware timer

Partial frame buffer to obtain data without increasing the burden of the processor

– 512 word deep internal FIFO

– supported display types:

– character display - use lidd controller for these displays

To program

– passive matrix LCD display - use LCD raster display control

Controller to provide continuous graphic refresh to passive display

Timing and data

– active matrix LCD display - use external frame buffer (empty)

Inter and internal DMA engines to drive the flow to the control panel

data

– 12 bit successive approximation register (SAR) ADC

– collect 200K samples per second

– any of the eight analog inputs multiplexed from the 8:1 analog switch

Select input

– can be configured as a 4-wire, 5-wire or 8-wire resistive touch screen

Controller (TSC) interface

– up to three 32-bit ECAP modules

– can be configured as three capture inputs or three standby PWM outputs

Out

– up to three enhanced high resolution PWM modules (ehrpwm)

– 16 bit dedicated time base meter with time and frequency control function

Counter

– can be configured as 6 single ended, 6 bilaterally symmetrical, or 3

Bilateral asymmetric output

– up to 3 32-bit enhanced quadrature coded pulse (eqep) modes

block

• device identification

– including electronic fuse set (fusefarm), some manufacturers can

programming

– production ID

– device part number (unique JTAG ID)

– device Version (readable by host arm)

• commissioning interface support

– for arm (cortex-a8 and PRCM) and pru

JTAG and cjtag for ICSS debugging

– support device boundary scan

– support ieee1500

• DMA

– on chip enhanced DMA controller (EDMA) with three third

TPTC and a third party channel controller

(TPCC), supporting up to 64 programmable logic channels and 8

QDMA channel. EDMA is used for:

– transfer to / from on-chip memory

– to / from external memory (EMIF, GPMC and slave peripherals)

delivery

• inter processor communication (IPC)

– integrated hardware based IPC mailbox and used for cortex

A8. Process synchronization between PRCM and pru-icss

Spinlock

– mailbox register generating interrupt

–

4 initial startup procedures (cortex-a8, PRCM

PRU0、PRU1）

– the spin lock has 128 software specified lock registers

• security

– cryptographic hardware accelerator (AES, Sha, RNG)

– secure boot

• startup mode

– reset the rising edge of the input pin by locking pwronrstn

To select the startup mode

• packaging:

– 298 pin s-pbga-n298 via channel package

(suffix ZCE), 0.65mm solder ball spacing

– 324 pin s-pbga-n324 package

(suffix ZCZ), 0.80mm welding ball spacing



Application scope

• game peripherals

• home and industrial automation

• consumer medical devices

• printer

• intelligent charging system

• networked vending machine

• electronic scale

• education console

• advanced toys