Mcimx280dvm4b mapbga-289 application processor
Mx28 is a low-power, high-performance application processor optimized for the general embedded industry and consumer market. The core of I. Mx28 is NXP's fast and energy-saving ARM926EJ-S? The implementation speed of the core is up to 454mhz.
The device is suitable for a wide range of applications,
include:
Human machine interface (HMI) panel:
Industry and family
Industrial drive, PLC, I / O control display, factory robot display, graphics
Handheld scanners and printers
Patient monitoring, portable medical equipment
Intelligent electric energy meter, energy gateway
Media gateway
I integrated power management unit (PMU). The mx28 consists of a three output DC-DC switching converter and multiple linear voltage regulators. These provide the device and its I / O peripherals, such as power sequencing of memory cards and SD cards, and provide battery charging capacity for lithium-ion batteries.
i。 The mx28 processor includes an additional 128K byte chip SRAM, making the device ideal for eliminating external RAM in applications that occupy small RTOS.
i。 Mx28 supports connection to various types of external memory, such as mobile DDR, DDR2 and lv-ddr2, SLC and mlcnand flash memory.
i。 The mx28 can be connected to a variety of external devices, such as high-speed USB2 0otg, can, 10 / 100 Ethernet and SD / SDIO / MMC.
Equipment function
The functions of i.mx28 are listed below:
ARM926EJ-S CPU runs at 454 MHz:
-16 KB instruction cache and 32 KB data cache
-ARM embedded tracking macro unit (coresight? Etm9?)
-Parallel JTAG interface
128 KB integrated low power on-chip SRAM
128 KB integrated mask programmable on-chip ROM
1280 bit on-chip one time programmable (ocotp) rom
16 bit mobile DDR (MDDR) (1.8V), DDR2 (1.8V) and lv-ddr2 (1.5V), up to 205 MHz DDR voltage overdrive clock frequency
Supports up to 8 NAND flash memory devices with up to 20 bit BCH ECC
Four synchronous serial ports (SSPS) for SDIO / MMC / MS / SPI: ssp0, ssp1, SSP2 and ssp3. SSP0
Ssp1 can support three modes, 1-bit, 4-bit and 8-bit, while SSP2 and ssp3 can only support three modes, 1-bit and 4-bit.
IEEE 802.3 compliant 10 / 100 Mbps Ethernet MAC?:
-Single 10 / 100 Ethernet with gmii / RMII interface or dual 10 / 100 Ethernet with RMII interface
-Support IEEE standard 1588- Compatible hardware timestamp
-Support 50 MHz / 25 MHz clock output of external Ethernet PHY
Two 2.0B protocol compatible controller area network (can) interfaces
One USB2 0 OTG device / host controller and physical layer
One USB2 0 host controller and physical layer
LCD controller, up to 24 bit RGB (dotck) mode and 24 bit system mode
Pixel processing pipeline (PXP) supports full path conversion from color space to scaling, alpha blending to rotation, and no intermediate memory access is required.
SPDIF transmitter
Dual serial audio interface (SAIF) supporting full duplex transmission and reception operation; Each Saif supports three pairs of stereos
Five applications universal asynchronous transceiver (UART), 3.25 Mbps hardware flow control
A debug UART that runs at speeds up to 115 KB / s using programmed I / O
Two I2C master / slave interfaces up to 400 kbps
Four 32-bit timers and one rotary timer
Eight pulse width modulators (PWMs)
Real time clock (RTC)
GPIO with interrupt function
The power management unit (PMU) supports three output DC-DC switching converters, multiple linear regulators, battery chargers and detectors.
16 channel low resolution A / D converter (lradc). There are 16 physical channels, but they can
Only 8 virtual channels can be mapped at a time.
Single channel high-speed A / D converter (hsadc) with data rate up to 2 MSPs
4 / 5-wire touch screen controller
Up to 8x8 keyboard matrix with button detection circuit
Safety function:
-Read only ID of digital rights management (DRM) algorithm
-Secure boot using 128 bit AES hardware decryption
-SHA-1 and sha256 hash hardware
-High assurance startup (hab4)
The device is suitable for a wide range of applications,
include:
Human machine interface (HMI) panel:
Industry and family
Industrial drive, PLC, I / O control display, factory robot display, graphics
Handheld scanners and printers
Patient monitoring, portable medical equipment
Intelligent electric energy meter, energy gateway
Media gateway
I integrated power management unit (PMU). The mx28 consists of a three output DC-DC switching converter and multiple linear voltage regulators. These provide the device and its I / O peripherals, such as power sequencing of memory cards and SD cards, and provide battery charging capacity for lithium-ion batteries.
i。 The mx28 processor includes an additional 128K byte chip SRAM, making the device ideal for eliminating external RAM in applications that occupy small RTOS.
i。 Mx28 supports connection to various types of external memory, such as mobile DDR, DDR2 and lv-ddr2, SLC and mlcnand flash memory.
i。 The mx28 can be connected to a variety of external devices, such as high-speed USB2 0otg, can, 10 / 100 Ethernet and SD / SDIO / MMC.
Equipment function
The functions of i.mx28 are listed below:
ARM926EJ-S CPU runs at 454 MHz:
-16 KB instruction cache and 32 KB data cache
-ARM embedded tracking macro unit (coresight? Etm9?)
-Parallel JTAG interface
128 KB integrated low power on-chip SRAM
128 KB integrated mask programmable on-chip ROM
1280 bit on-chip one time programmable (ocotp) rom
16 bit mobile DDR (MDDR) (1.8V), DDR2 (1.8V) and lv-ddr2 (1.5V), up to 205 MHz DDR voltage overdrive clock frequency
Supports up to 8 NAND flash memory devices with up to 20 bit BCH ECC
Four synchronous serial ports (SSPS) for SDIO / MMC / MS / SPI: ssp0, ssp1, SSP2 and ssp3. SSP0
Ssp1 can support three modes, 1-bit, 4-bit and 8-bit, while SSP2 and ssp3 can only support three modes, 1-bit and 4-bit.
IEEE 802.3 compliant 10 / 100 Mbps Ethernet MAC?:
-Single 10 / 100 Ethernet with gmii / RMII interface or dual 10 / 100 Ethernet with RMII interface
-Support IEEE standard 1588- Compatible hardware timestamp
-Support 50 MHz / 25 MHz clock output of external Ethernet PHY
Two 2.0B protocol compatible controller area network (can) interfaces
One USB2 0 OTG device / host controller and physical layer
One USB2 0 host controller and physical layer
LCD controller, up to 24 bit RGB (dotck) mode and 24 bit system mode
Pixel processing pipeline (PXP) supports full path conversion from color space to scaling, alpha blending to rotation, and no intermediate memory access is required.
SPDIF transmitter
Dual serial audio interface (SAIF) supporting full duplex transmission and reception operation; Each Saif supports three pairs of stereos
Five applications universal asynchronous transceiver (UART), 3.25 Mbps hardware flow control
A debug UART that runs at speeds up to 115 KB / s using programmed I / O
Two I2C master / slave interfaces up to 400 kbps
Four 32-bit timers and one rotary timer
Eight pulse width modulators (PWMs)
Real time clock (RTC)
GPIO with interrupt function
The power management unit (PMU) supports three output DC-DC switching converters, multiple linear regulators, battery chargers and detectors.
16 channel low resolution A / D converter (lradc). There are 16 physical channels, but they can
Only 8 virtual channels can be mapped at a time.
Single channel high-speed A / D converter (hsadc) with data rate up to 2 MSPs
4 / 5-wire touch screen controller
Up to 8x8 keyboard matrix with button detection circuit
Safety function:
-Read only ID of digital rights management (DRM) algorithm
-Secure boot using 128 bit AES hardware decryption
-SHA-1 and sha256 hash hardware
-High assurance startup (hab4)
Provide 289 needle ball grid array (BGA)
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