Sn74hc595dr soic-16 8-bit shift register price advantage
features
• 8-bit serial input, parallel output shift
• wide operating voltage range from 2 V to 6 V • high current three state output can drive loads up to 15 lstl
• low power consumption: 80- μ A (value) ICC
• TPD = 13 ns (typ.)
• 6 Ma output drive at 5 V • low input current: 1 μ A (value)
• the shift register has a direct clear function
The hc595 device contains an 8-bit serial input and parallel output shift register, which provides an 8-bit D-type storage register. The storage register has parallel three state outputs. Separate clocks are provided for shift registers and storage registers. The shift register has a direct override clear (srclr) input, a serial (SER) input, and a serial output for cascading. When the output enable (OE) input is high, the output is in a high impedance state.
Both the shift register clock (srclk) and the storage register clock (rCLK) are triggered by the positive side. If two clocks are connected together, the shift register is always a clock pulse in front of the storage register.
• 8-bit serial input, parallel output shift
• wide operating voltage range from 2 V to 6 V • high current three state output can drive loads up to 15 lstl
• low power consumption: 80- μ A (value) ICC
• TPD = 13 ns (typ.)
• 6 Ma output drive at 5 V • low input current: 1 μ A (value)
• the shift register has a direct clear function
The hc595 device contains an 8-bit serial input and parallel output shift register, which provides an 8-bit D-type storage register. The storage register has parallel three state outputs. Separate clocks are provided for shift registers and storage registers. The shift register has a direct override clear (srclr) input, a serial (SER) input, and a serial output for cascading. When the output enable (OE) input is high, the output is in a high impedance state.
Both the shift register clock (srclk) and the storage register clock (rCLK) are triggered by the positive side. If two clocks are connected together, the shift register is always a clock pulse in front of the storage register.